The phyCORE-AM65x development kit has a set of boot configuration DIP switch banks that can be used to select a primary and backup boot interface. The DIP switches allow you to toggle the state of the BOOTMODE[18:0] (X_VOUT1_DATA#_BOOTMODE#) signals that are latched at power on. By default the phyCORE-AM65x SOM has been configured to boot from onboard eMMC flash. This guide provides information about how to override and set additional configurations using the DIP switches on the development kit. 


Boot SwitchDescriptionBOOTMODE control
S3

Primary boot configuration

4-pin DIP switch 

BOOTMODE[3:0]
S4

Primary boot configuration

8-pin DIP switch 

BOOTMODE[15:8]
S5

Backup boot configuration

8-pin DIP switch 

BOOTMODE[6:4]

BOOTMODE[18:16]

JP7Minimum configuration pin (MIN)BOOTMODE[7]

For information about additional boot options, view the How-To Guide located here.

Primary Boot (S3 / S4)

Use the following visual guide to set boot switches for primary boot configurations on the phyCORE-AM65x development kit. Please note the S3 and S4 switches set the primary boot configuration. S5 settings are discussed in the next section but are provided for convenience. 

The Boot Switches should only be modified with the AM65x Development Kit completely powered off and disconnected from a power supply. 

eMMC (SOM)

SD Card (X13)

Backup Boot

Please use the following visual guide to set boot switches for backup boot configurations on the phyCORE-AM65x Carrier Board. 

No Backup Boot

S5

SD/MMC

S5

For more information regarding the changing of Boot Modes, see Change Software Boot Settings.

MIN Pin

The TI AM65x processor is equipped with a minimal boot config (MIN) pin. When enabled, boot configuration settings are ignored and the system will attempt to boot using pre-defined values from the ROM code. 

JP7 StateDescription
OpenDisabled (sets MIN pin low)
Closed

Enabled (sets MIN pin high)