How to Configure the BSP to enable SPI3

This guide describes how to modify the Linux BSP to utilize SPI3 with the development kit. Support for SPI3 already exists but we will need to modify it in order to use it as intended. In this guide we will also be removing support for PHYTEC supported Raspberry PI HATs due to a potential conflict in pin muxing options (for a list of supported Raspberry Pi Hats refer to the Release Notes). 

Step-by-step guide

Once you have completed the BSP Development Guide you will have access to all the source files. 

The steps below will outline how to modify the BSP manually to enable SPI3. You could also just apply this patch file:

imx7d-phyboard-zeta-004-PD19_1_0-ENABLE-SPI.patch

• Navigate to the Linux source code: 

  Host (Ubuntu)

  cd $YOCTO_DIR/build/tmp/work/imx7d_phyboard_zeta_004-poky-linux-gnueabi/linux-phytec-fsl/4.14.78+git_v4.14.78-phy2-r0/git/

  CODE

• Edit the device tree source include (dtsi) file for interfaces terminating at the PEB-D-RPI Expansion Board: 

  Host (Ubuntu)

  vim arch/arm/boot/dts/imx7-peb-d-rpi.dtsi 

  CODE

• In the pin control group for ecspi3 and ecspi3_ss (chip select), we will need to change the muxing options for all pins relating to ecspi3 such that they are configured for SPI. See the following excerpt of a patch file for the needed changes: 

  Patch Excerpt #1

  @@ -144,15 +144,15 @@
   
   		pinctrl_ecspi3: ecspi3grp {
   			fsl,pins = <
  -				MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO	0x2	/* Labeled X_SPI3_MISO on schematic */
  -				MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI	0x2	/* Labeled X_SPI3_MOSI on schematic */
  -				MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK	0x2	/* Labeled X_SPI3_SCLK on schematic */
  +				MX7D_PAD_SAI2_TX_SYNC__ECSPI3_MISO	0x1	/* Labeled X_SPI3_MISO on schematic */
  +				MX7D_PAD_SAI2_TX_BCLK__ECSPI3_MOSI	0x1	/* Labeled X_SPI3_MOSI on schematic */
  +				MX7D_PAD_SAI2_RX_DATA__ECSPI3_SCLK	0x1	/* Labeled X_SPI3_SCLK on schematic */
   			>;
   		};
   
   		pinctrl_ecspi3_ss0: ecspi3_ss0grp {
   			fsl,pins = <
  -				MX7D_PAD_SAI2_TX_DATA__GPIO6_IO22	0x59	/* Labeled X_SPI3_SS0 on schematic */
  +				MX7D_PAD_SAI2_TX_DATA__ECSPI3_SS0	0x1	/* Labeled X_SPI3_SS0 on schematic */
   			>;
   		};

  CODE
  

  The way to read patches

  • The block of code that will be changed will start on line 144 as indicated at the top of the patch.
  • The original line of code is prefixed with "-" at the beginning of the line
  • The resulting line of code (after the change has been made), is prefixed with "+" at the beginning of the line

  In this case, we are changing the hexadecimal numbers from 0x2 to 0x1. This configures the pins for use as a SPI signal.  

• Next, we will remove support for Raspberry Pi HAT's since there is a conflicting muxing option for these pins. We can disable the rpi_hat_eeprom node quite easily by setting the status to "disabled": 

  Patch Excerpt #2

  @@ -231,7 +231,7 @@
   		compatible = "phytec,phytec-hat";
   		reg = <0x50>;
   		read-only;
  -		status = "okay";
  +		status = "disabled";
   	};
   
   	pebdrpi_eeprom: eeprom@56 {

  CODE

• Finally, we will modify the ecspi3 node itself. We will first enable it by setting the status to "okay" and then we will add a child node that represents chip select 0 on the ecspi3 bus (this child node contains the names of compatible drivers as specified in drivers/spi/spidev.c and the maximum bus frequency of the interface):

  Patch Excerpt #3

  @@ -267,7 +267,13 @@
   &ecspi3 {
   	pinctrl-names = "default";
   	pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_ss0>;
  -	status = "disabled";
  +	status = "okay";
  +	spi@0 {
  +		ranges;
  +                compatible = "rohm,dh2228fv";
  +                spi-max-frequency = <52000000>;
  +                reg = <0>;
  +        };
   };
   
   &uart1 {
  
  

  CODE
• Save and close the file.

• Navigate back to our build directory: 

  Host (Ubuntu)

  cd $YOCTO_DIR/build

  CODE

• Rebuild the Linux Kernel with the following command: 

  Host (Ubuntu)

  MACHINE=imx7-phyboard-zeta bitbake linux-phytec-fsl -f -c compile && bitbake linux-phytec-fsl

  CODE
• The above command only re-compiles and generates the zImage and dtb and should take far less time than it took to first build the entire BSP.
• The images generated are deployed to $YOCTO_DIR/build/tmp/deploy/images/imx7-phyboard-zeta-004. The file you will need is imx7d-phyboard-zeta-004.dtb. 
• To test out the file, copy it over to the boot partition of your SD card and rename it as "oftree".